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| savantic semiconductor product specification silicon pnp power transistors NS50P d escription with to-220c package complement to type ns50n applications for medium power linear amplifier applications pinning pin description 1 emitter 2 collector;connected to mounting base 3 base absolute maximum ratings(t c =25) symbol parameter conditions value unit v cbo collector-base voltage open emitter -60 v v ceo collector-emitter voltage open base -60 v v ebo emitter-base voltage open collector -5 v i c collector current (dc) -6 a i cm collector current-pulse -10 a i b base current -2 a t c =25 65 p c collector power dissipation t a =25 2 w t j junction temperature 150 t stg storage temperature -65~150
savantic semiconductor product specification 2 silicon pnp power transistors NS50P characteristics tj=25 unless otherwise specified symbol parameter conditions min typ. max unit v ceo(sus) collector-emitter sustaining voltage i c =-30ma; i b =0 -60 v v ce( sat ) collector-emitter saturation voltage i c =-6a ;i b =-0.6a -1.5 v v be base-emitter on voltage i c =-6a ; v ce =-4v -2.0 v i ces collector cut-off current v ce =-60v; v eb =0 -0.4 ma i ceo collector cut-off current v ce =-30v; i b =0 -0.7 ma i ebo emitter cut-off current v eb =-5v; i c =0 -1.0 ma h fe-1 dc current gain i c =-0.3a ; v ce =-4v 50 160 h fe-2 dc current gain i c =-3a ; v ce =-4v 15 f t transition frequency i c =-0.5a ; v ce =-10v 3 mhz h fe-1 classifications a b 50-100 80-160 savantic semiconductor product specification 3 silicon pnp power transistors NS50P package outline fig.2 outline dimensions |
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